Part Number: CYDD18S18V18
File Name: cydd18s72v18...
No. of Pages: 53
File Size: 2422.47 KB
Download Hits: 0 |
 |
|
 |
|
| Current URL: http://www.datasheetpro.com/505122_download_CYDD18S18V18_datasheet.html
|
|
|
Can't see the PDF below?
Install Acrobat Reader from Google Pack.
|
Abstract:
The FullFlex™ Dual-Port SRAM families consist of 4-Mbit, 9-Mbit, 18-Mbit, and 36-Mbit synchronous, true dual-port static RAMs that are high-speed, low-power 1.8V/1.5V CMOS. Two ports are provided, allowing the array to be accessed simulta- neously. Simultaneous access to a location triggers determin- istic access control. For FullFlex72, these ports can operate independently in DDR mode with 36-bit bus widths or in SDR mode with 72-bit bus widths. For FullFlex36 and FullFlex18, the ports operate in DDR mode only. Each port can be independently configured for two pipelined stages for SDR mode or 2.5 stages in DDR mode. Each port can also be configured to operate in pipelined or flow-through mode in SDR mode.
|
|
|
Disclaimer: All trademarks and registered trademarks are the property of their respective owners. The information presented on this site is for suggestion purposes only. Datasheetpro.com recommends that you review the component datasheet to confirm the device functionality, pin-out, and performance for your application. Datasheetpro.com is not responsible for any incorrect or incomplete information.
Keywords: bridge rectifier, electronic component, electronic component supply, electronic components, electronics component, ics, integrated circuit, obsolete electronic component, obsolete ic, power resistors, power transformer, resistors, semiconductor, solar lights, solar panels, voltage regulators
© 2007-2008 DatasheetPro
|
