EPROM
Single-PLL General-Purpose EPROM Programmable Clock Generator
The CY2907 is a general-purpose Clock Generator designed for use in a wide variety of applications-from graphics to PC peripherals to disk drives. It generates selectable system clock frequencies from a single reference input (crystal or reference clock). The CY2907 is configured with n EPROM array, much like the other devices in the Cypress EPROM Programmable Clock Family, making it easily customizable for any applica- tion. Furthermore, the CY2907 is compatible with all indus- try-standard 9
AT27C020 2-megabit (256K x 8) OTP EPROM
The AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time programmable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states on highperformance microprocessor systems.
AT8PS54/S56 EPROM/ROM-Based 8-Bit Microcontroller
DESCRIPTION The AT8PS54/S56 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 42 instructions. All instructions are single cycle except for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly. The AT8PS54/S56 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT), Oscillator Start-
M27C322 32 Mbit (2Mb x16) UV EPROM and OTP EPROM
The M27C322 is a 32 Mbit EPROM offered in the UV range (ultra violet erase). It is ideally suited for microprocessor systems requiring large data or program storage. It is organised as 2 MWords of 16 bit. The pin-out is compatible with a 32 Mbit Mask ROM.
Configuring Virtex FPGAs from Parallel EPROMs with a CPLD
Previous generations of Xilinx FPGAs supported a Master Parallel Configuration Mode which allowed the FPGA to configure itself directly from a parallel (byte wide) PROM. The Virtex family of Xilinx FPGAs does not utilize a Master Parallel mode. This appnote describes a simple interface design to configure a Virtex device from a parallel EPROM using the SelectMAP configuration mode.
Integrated Circuit NMOS, 128K (16K x 8) UV EPROM
The NTE21128 is a 131,072 bit UV erasable and electrically programmable memory EPROM in a 28-Lead DIP type package organized as 16,384 words by 8 bits. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
AT27LV040A 4-Megabit (512K x 8) Low Voltage OTP EPROM
The AT27LV040A is a high-performance, low-power, low-voltage, 4,194,304-bit onetime programmable read-only memory (OTP EPROM) organized as 512K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power.
AT8A21 EPROM/ROM-Based 8-Bit Microcontroller Serie
DESCRIPTION The AT8A21 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 38 instructions. All instructions are single cycle except for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly. The AT8A21 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT), Oscillator Start-up Timer(O
M27C4001 4 Mbit (512Kb x 8) UV EPROM and OTP EPROM
The M27C4001 is a 4 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large programs and is organised as 524,288 by 8 bits.
Booting the ADSP-21065L from an EPROM using VisualDSP 4.1
This document does not describe the basic boot procedure. Only 21065L specific issues will be discussed. For a more general description, please find the EE-Notes 56, 72 and 77.