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EPROM

Single-PLL General-Purpose EPROM Programmable Clock Generator

The CY2907 is a general-purpose Clock Generator designed for use in a wide variety of applications-from graphics to PC peripherals to disk drives. It generates selectable system clock frequencies from a single reference input (crystal or reference clock). The CY2907 is configured with n EPROM array, much like the other devices in the Cypress EPROM Programmable Clock Family, making it easily customizable for any applica- tion. Furthermore, the CY2907 is compatible with all indus- try-standard 9

Relevant Keywords: 
CY2907F8, CY2907SC-xxx, CY2907F14I, CY2907I , CY2907F14, CY2907FI, CY2907F, CY2907SL-xxx, CY2907F8I, CY2907, CY2907SI-xxx

AT27C020 2-megabit (256K x 8) OTP EPROM

The AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time programmable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states on highperformance microprocessor systems.

Relevant Keywords: 
AT27C020-55PI, AT27C020-90PU, AT27C020-90JA, AT27C020-55JU, AT27C020-90PI, AT27C020-55TU, AT27C020-55JI, AT27C020-90PA, AT27C020-55TI, AT27C020-90TU, AT27C020, AT27C020-90JU, AT27C020-55PU, AT27C020-90TI, 0570G, AT27C020-90JI

AT8PS54/S56 EPROM/ROM-Based 8-Bit Microcontroller

DESCRIPTION The AT8PS54/S56 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 42 instructions. All instructions are single cycle except for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly. The AT8PS54/S56 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT), Oscillator Start-

Relevant Keywords: 
AT8PS54/S54E/55/55E, IOB4, PHB1, FM8P54SE, ODB4, WUB0, IOA3, PCHBUF1, WUB7, IOB0, PDB2, AT8PS56, ODB0, PHB5, INTEDGT0CS, PC0Bh, WUB3, IOA5/RSTB, PDA1, AT8PS54/S54E, IOB3, PHB00Eh, FM8P54S, ODB3, TMR0, IOA2IOA5/RSTB, PC98, WUB6WUB5WUB4WUB3WUB2, IOA7/OSCI, PDB1, AT8PS54E/S56E, IOB7, PHB4, GP2GP0, ODB7, WUB2, IOA5, PDA00Ch, AT8P54/56, IOB2, PHB0, DC-20, ODB2, PHB7, IOA2, PC90, WUB6, IOA7, PDB0, AT8PS54/S56, IOB6, PHB3, FM8P56SE, ODB6, WUB1, IOA4/T0CKI, PDA0, 1K13, IOB1, PDB3, DC-100, ODB1, PHB6/PHB5/PHB4/PHB3/PHB2, IOA1, PC80, WUB5, IOA6/OSCO, PDA3, AT8PS54/S54E/56/S56E, IOB5, PHB2, FM8P56S, ODB5, WUB00Ah, IOA4, PCHBUF10, 10AT8PS54/S56, IOB0/INT, PDB2/PDB1/PDB0/PDA3/PDA2, AT8PS56/S56E, ODB00Dh, PHB6, IOA0, PC70, WUB4, IOA6, PDA2

Configuring Virtex FPGAs from Parallel EPROMs with a CPLD

Previous generations of Xilinx FPGAs supported a Master Parallel Configuration Mode which allowed the FPGA to configure itself directly from a parallel (byte wide) PROM. The Virtex family of Xilinx FPGAs does not utilize a Master Parallel mode. This appnote describes a simple interface design to configure a Virtex device from a parallel EPROM using the SelectMAP configuration mode.

Relevant Keywords: 
XC9500, Virtex

Integrated Circuit NMOS, 128K (16K x 8) UV EPROM

The NTE21128 is a 131,072 bit UV erasable and electrically programmable memory EPROM in a 28-Lead DIP type package organized as 16,384 words by 8 bits. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.

Relevant Keywords: 
NTE21128s, NTE21128

AT27LV040A 4-Megabit (512K x 8) Low Voltage OTP EPROM

The AT27LV040A is a high-performance, low-power, low-voltage, 4,194,304-bit onetime programmable read-only memory (OTP EPROM) organized as 512K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power.

Relevant Keywords: 
AT27LV040A-90TI, AT27LV040A-90JU, AT27LV040A-90JI, AT27LV040A-90VI, AT27LV040A, AT27LV040A-90TU, 0557D

AT8A21 EPROM/ROM-Based 8-Bit Microcontroller Serie

DESCRIPTION The AT8A21 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 38 instructions. All instructions are single cycle except for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly. The AT8A21 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT), Oscillator Start-up Timer(O

Relevant Keywords: 
AT8A21AE, IOB1, WUA1, CMP1, IRC2, WUB00Dh, IOA0/CMP0, IRD2, IOA5, STACK80, AT8A21CE, IOB5, WUA5, DC-100, IRC6, WUB4, IOA2/CMP2, IRD6, AT8A21A, IOB0/IROUT, WUA00Ch, CMP0, IRC1, WUB0, IOA0, IRD1, WUB7, IOA4/VREF, PS2PS0, AT8A21C, IOB4, WUA4, CMPONVREF1VREF0C3ONC2ON, IRC5, WUB3, IOA2, IRD5, AT8A21/21E, IOB0, WUA0, AT8A21_Ver-B, IRC0, WUA7, GP2GP0, IRD0, WUB6WUB5WUB4WUB3WUB2, IOA4, PC80, AT8A21BE, IOB3, WUA3, CMP3, IRC4, WUB2, IOA1/CMP1, IRD4, AT8A21, IOA7, VREF1VREF0, AT8A21E, IOB7, WUA6WUA5WUA4WUA3WUA2, FSR6, IRC7IRC0, WUB6, IOA3/CMP3, PC70, AT8A21B, IOB2, WUA2, CMP2, IRC3, WUB1, IOA1, IRD3, 10AT8A21D, IOA6, TMR0, AT8A21DE, IOB6, WUA6, DC-20, IRC7, WUB5, IOA3, IRD7

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