The MK5818 generates a low EMI output clock and a reference clock from a clock or crystal input. The part is designed to lower EMI through the application of spreading a clock. Using ICS' proprietary mix of analog and digital Phase Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB depending on spread range. The MK5818 offers a range of down spread from a high speed clock or crystal input. The MK5818 gen

Reference Crystal Input Analog Voltage Supply Output enable (0-off; 1-on) Ground Voltage Supply 142.8-MHz clock outputGround Reference Crystal Output

The SY89312V is an integrated ·2 divider with differential clock inputs. It is functionally equivalent to the SY100EP32V but in an ultra-small 8-lead MLF® package that features a 70% smaller footprint.

The EL6938 is a highly integratedlaser diode driver designed to supportmulti-standard writable optical drives.It accomplishes this by incorporating a waveform generatorwherein the diode currents and timing details can beprogrammed before operation. The data input circuitryinspects the NRZ serial data waveform and generatesprogrammed waveforms in recognition of 3, 4, 5, or 6 ormore clock periods of space changing to 3, 4, 5, or 6 or moreclock periods of mark, and vice versa.

The ICS843011 is a Fibre Channel Clock Generator and a member of the HiPerClocksTM family of high performance devices from IDT. The ICS843011 uses a 26.5625MHz crystal to synthesize 106.25MHz or a 25MHz crystal tosynthesize 100MHz. The ICS843011 has excellent <1ps phase jitter performance, over the 637kHz - 10MHz integration range. The ICS843011 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.

The AD9925 is a complete 36 MHz front end solution for digi-tal still camera and other CCD imaging applications. Based on the AD9995 product, the AD9925 includes the analog front end and a fully programmable timing generator (AFETG), combined with a 10-channel vertical driver (V-driver). A Precision Timing core allows adjustment of high speed clocks with approximately 600 ps resolution at 36 MHz operation.

DESCRIPTION The AD9516-11 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.30 GHz to 2.65 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz may be used. The AD9516-1 emphasizes low jitter and phase noise to maximize data converter performance and can benefit other applications with demanding phase noise and jitter requirements. FUNCTIONAL BLOCK DIAGRAM REFINREF1REF2CLKLFSWITCHOVERAND MO

The ICS932S200 is a dual CPU clock generator for serverworks HE-T, HE-SL-T, LE-T chipsets for P III type processors in a Dual-CPU system. Single ended CPU clocks provide faster than 1.5V/ns transition times by parallel connection of 2 CPU pins to each processor. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS932

The ICS873991-147 is a low voltage, low skew, 3.3V LVPECL or ECL Clock Generator and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS873991-147 has two selectable clock inputs. The PCLK, nPCLK pair can accept an LVPECL input and the REF_CLK pin can accept a LVCMOS or LVTTL input. This device has a fully integrated PLL along with frequency configurable outputs. An external feedback input and output regenerates clocks with "zero de- lay".Th

The CY2544 and CY2546 are four-PLL programmable Spread Spectrum Clock Generators used to reduce EMI found in high-speed digital electronic systems. Two of the four PLLs have Spread Spectrum capability. The spread spectrum feature is turned on or off using the control pin SSON. The advantage of having four PLLs is that a single device can generate up to four independent families of frequencies from a single crystal or reference input frequency. Generally, a design requires up to four oscillators