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Logic

ISO - LOGIC INVERTER SCHMITT TRIGGER INTERRUPTER SWITCH

The H21L_ and H22L_ series of transmissivephotointerrupters are single channel switchesconsisting of a Gallium Arsenide infraredemitting diode coupled to a high speed integratedcircuit detector. The output incorporates aSchmitt trigger which provides hysteresis fornoise immunity and pulse shaping. The gap inthe plastic housing provides a means ofinterrupting the signal with an opaque material,switching the output from an 'ON' into an 'OFF'state.

Relevant Keywords: 
H22L2, H22L1, H21L2, H21L1, DB91085-AAS

uPSD3212A, uPSD3212C uPSD3212CV Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic

The uPSD321x Series combines a fast 8051-based microcontroller with a flexible memory structure, programmable logic, and a rich peripheral mix including USB, to form an ideal embedded controller. At its core is an industry-standard 8032 MCU operating up to 40MHz.

Relevant Keywords: 
uPSD3212A-40U6, uPSD3212CV, uPSD3212A-40T6, uPSD3212C-40U6, uPSD3212A, uPSD321x, uPSD3212C-40T6, uPSD3200, uPSD3212CV-24U6, uPSD3212C, uPS3200, uPSD3212CV-24T6

Embedded Programmable Logic Device

Under certain voltage conditions, the output buffer delay for Revision A and Revision B EPF10K100B devices is slower than the reported value for I/O pins with the Slow Slew Rate option turned on in the MAX+PLUS® II software. The MAX+PLUS II version 9.0 Timing Analyzer and Simulator report an added output delay of 4.5 ns when the Slow Slew Rate option is turned on. When the Slow Slew Rate option is turned on and the VCCINT and VCCIO pins are powered at 2.3 V and 3.6 V, respectively, the cha

Relevant Keywords: 
EPF10K100B

PHK24NQ04LTTrenchMOS logic level FETRev. 01 12 Sep

Descriptiontechnology.Product availability:PHK24NQ04LT in SOT96-1 (SO8).1.3Applications1.4Quick reference data2.Pinning informationnLogic level compatiblenLow gate charge.nDC-to-DC convertersSwitched-mode power supplies.nVDS 40VnID 21.2AnPtot 6.25WnRDSon 7.7mW.1,2,3source (s)SOT96-1 (SO8)4gate (g)5,6,7,8 drain (d)51Top viewMBK187sdgMBB076Philips SemiconductorsPHK24NQ04LTTrenchMOS logic level FETProduct dataRev. 01 12 September 20032 of 12 Koninklijke Philips Electronics N.V. 2003. All rights res

Relevant Keywords: 
03aj98, GSTj25, Tj25, W-40V, C36-V, PHK24NQ04LT, VDD20VFig, 03aa36, DC10, Tj-55, W-30-ns, C03ak01, IDID25C, VDD20V, 03aa33, D14A, SOT96-1, VGS5V, 0VTj25, ID1A, V03ak0502468, 03aa25, CRGS20k, RDSon25C, VGS10V.Fig, 03aj99, ID(A)10, V03ak0205, 03aa17, C40-V, PHK24NQ04LT-01, VGS0VI

NDP6030PL NDB6030PL P-Channel Logic Level Enhancement Mode Field Effect Transistor

These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed.

Relevant Keywords: 
NDP6030PL, NDB6030PL

Xilinx UG350 Virtex-5 LogiCORE Endpoint Block for PCI Express Designs, User Guide

Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118Test Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119Simulation Scripts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120Chapter7: Implementing the CoreCore Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Relevant Keywords: 
UG350, 9UG350, 7UG350, 5UG350, 3UG350

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