The WCMC4008V9B is a high-performance CMOS pseudo static RAMs (PSRAM) organized as 512K words by 8 bits.

The TC55NEM216ASGV is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.7 to 5.5 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1.8 µA standby current (typ) when chip enable (CE) is asserted h

Rugged construction, meets MIL-T- 28800D, Type 2, Class 2, Style A requirements Automatic Test Sequence mode to allow one person operation Control Motion Deflection Position to test auto-pilot coupling Complete simulation of the MLS transmission cycle, including all angular information as well as data words

The CYU01M16SCE is a high-performance CMOS Pseudo Static RAM organized as 1M words by 16 bits that supports an asynchronous memory interface. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device can be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are p

The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized as 256K x 16. It is fabricated using IDT's high-perfomance, high-reliability CMOS technology. This state-of-the-art technology, combined with inno-vative circuit design techniques, provides a cost-effective solution for high- speed memory needs.The IDT71V416 has an output enable pin which operates as fast as 5ns, with address access times as fast as 10ns. All bidirectional inputs and outputs of the IDT71V416 are LVTTL-compatibl

The CY62147EV18 is a high performance CMOS static RAM organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99% when desel

The A3024 is a low power CMOS real time clock. Standby current is typically 1.2 A and the access time is 50 ns. The interface is 8 bits with multiplexed address and data bus. Multiplexing of address and data is handled by the input line /D. There are no busy flags in the A3024, internal time update cycles are invisible to the user's software. Time data can be read from the A3024 in 12 or 24 hour data formats. An external signal puts the A3024 in standby mode. Even in standby, the A3024 pulls

True dual-ported memory cells which allow simulta-neous access of the same memory location Six Flow-Through/Pipelined devices -64K x 8/9 organizations (CY7C09089/189) -128K x 8/9 organizations (CY7C09099/199) Three Modes -Flow-Through -Pipelined -Burst Pipelined output mode on both ports allows fast 100- MHz cycle time 0.35-micron CMOS for optimum speed/power High-speed clock to data access 6.5[1] /7.5/9/12 ns (max.)

The ISSI IS62VV25616LL is a high-speed, 4,194,304 bit static RAMs organized as 262,144 words by 16 bits. They are fabricated using ISSI's high-performance CMOS technology.

PowerAttenuatorTM Variable Optical Attenuator