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ET101B, ET1011B


Specifications Test # Test Label Result 14.1.1 TP_IDL, Silence Duration and Silence Voltage a PASS b PASS c PASS Comments on Test Procedure Purpose: To verify the timing of signals following the start of TP_IDL. a. The period of time between the start of TP_IDL and the next link test pulse should be 16 ±8 ms. b. The period of time between repeating link test pulses should be 16 ±8 ms. c. The peak differential voltage during periods of silence should remain at 0 ±50 mV. Comments on Test Results a. Time between the start of TP_IDL and next link test pulse = 14.4 ms. b. Time between consecutive link test pulses = 15 ms. c. The peak differential voltage during silence properly remained between ±50 mV. Test # Test Label Result 14.1.2 TD Short Circuit Fault Tolenance a PASS b PASS Comments on Test Procedure Purpose: To verify transmitter tolerance to short circuits. a. When idle, the peak output current during a short circuit should not exceed 300 mA. b. While transmitting data, the peak

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ET101B, ET1011B

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