Hex Buffer
Features DIAGRAMS · High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V · Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C · High Noise Immunity: VNIH = VNIL = 28% VCC 14 · Power Down Protection Provided on Inputs 14 SOIC-14 D SUFFIX LVX50 AWLYWW · Balanced Propagation Delays 1 CASE 751A · Designed for 2.0 V to 3.6 V Operating Range 1 · Low Noise: VOLP = 0.5 V (Max) · Pb-Free Packages are Available* 14 TSSOP-14 LVX 14 DT SUFFIX 50 1 CASE 948G ALYW 1 14 SOEIAJ-14 74LVX50 M SUFFIX ALYW 14 CASE 965 1 1 A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 1 Publication Order Number:
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MC74LVX50DG, MC74LVX50DTR2, MC74LVX50D, MC74LVX50MG, MC74LVX50DT, MC74LVX50, MC74LVX50MELG, MC74LVX50DR2G, LVX50, MC74LVX50MEL, MC74LVX50DR2, 74LVX50, MC74LVX50M
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