A623308A Series 8K X 8 BIT CMOS SRAM (July, 2006,
Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Pin Configurations DIP / SOP TSOP ~~A623308AV 19 2820A11 2345678 1011121314 A9A8 NCNCA12 A7A6A5A4A3 272625242322211918171615I/O 6I/O 5I/O 4I/O 3VSSI/O 2I/O 1I/O 0 A0A1A2A10VCCI/O 7 OE WE CE ~~ NCA12A7A6A5A4A3A2A1A0I/O 0I/O 1I/O 2GNDI/O 3I/O 4I/O 5I/O 6I/O 7 CEOEA11A9A8 NC WEVCCA10A623308A(M) 123456789 10111213141516171819202122232425262728 A623308A Series (July, 2006, Version 1.0) 2 AMIC Technology, Corp. Block Diagram ROW DECODER128 X 512MEMORY ARRAYINPUT DATACIRCUITCOLUMN I/OCONTROLCIRCUITCE WE I/O 7 I/O 0 A12A11A10 A0 Features Power Supply Range: 4.5V to 5.5V Access times: 70 ns A623308A-S series: Operating: 35mA (max.) Standby: 10A (max.) A623308A-SI/SU series: Operating: 35mA (max.) Standby: 15A (max.) Extended operating temperature range: 0C to 70C for -S series, -25C to 85C for -SI series, -40C to 85C for -SU series. Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2.0V (min.) Available in 28-pin, DIP/SOP and TSOP Pb-Free package only All Pb-free (Lead-free) products are RoHS compliant General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input specification is not implied and exposure to a
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CEOEA11A9A8, WEVCCA10A623308A(M), DECODER128, ASA1b, NCNCA12, CLZ2, AMIC_469, NCA12A7A6A5A4A3A2A1A0I/O, CHZ2, 7tWP2tAS1(4)tCW5tAWtWR3WEDOUT, ISB1, CHZ1, 2820A11, EHLL1c
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