MW_DVB-T/H DVB Terrestrial/Handheld Modulator Cor
Description The MW_DVB-T/H Modulator Core performs the digital baseband functions required for the transmission side of a Digital Video Broadcasting Terrestrial link. The core implements the framing functions as defined by ETSI EN 300 744 V1.5.1 (2004-11), including the additional features for DVB-H as defined in the annex F. It accepts a single, or pair in hierarchical transmission mode, MPEG-2 formatted transport stream(s) and produces complex I/Q symbol pairs which should be supplied to an external upconverter. Functional Description Energy Dispersal This block receives an MPEG-2 transport packet and produces a randomized data stream, as defined at clause 4.3.1 of ETSI EN 300 744 V1.5.1 (2004-11).This block inverts a sync byte every eight sync byte received.The polynomial for the pseudo random binary sequence (PRBS) generator is: 1 + x14 + x15. The sync byte of the first packet is bit-wise inverted from 47HEX to B8HEX, and the PRBS generator is loaded with the seed sequence 10010101 Features Available under terms of the SignOnce IP License Fully compliant with ETSI EN 300 744 V1.5.1 (2004-11) Support DVB-H functionality (ETSI EN 300 744 V1.5.1 (2004-11) - annex F) Configurable for 2K, 4K and 8K Transmission Modes Support Hierarchical Transmission Mode Status and control registers available for start up and continuous test and management Internal 20 bit architecture for high level MER and BER performances : - SFN synchronization - ASI/SPI channel interface - Linear and Not Linear Precorrection - Out-of-band spectral mask filtering (clause 4.8.2 ETSI EN 300 744 V1.5.1 (2004-11)) - Internal or external -controller interface Table 1: Example Implemen tation Statistics for Xilinx FPGAs Family Example Device Fmax (MHz) IOB1GCLK BRAM MULT/ DSP48/EDCM / CMT MGT Design Tools Spartan -3 XC3S4000-4 78 4585 135 1 68 12 0 N/A ISE 9.2.04iVirtex -4 XC4VLX40-10 106 4494 135 1 68 12 0 N/A ISE 9.2.04iVirtex -5 XC5VLX50-1 142 1935 135 1 34 12 0 N/A ISE 9.2.04iNotes: 1) Assuming all Specification AllianceCORE Facts Provided with
Other Descriptions
| T_MODE(10) PCN | T_MODE(10) Product Brief | T_MODE(10) 相等於 | T_MODE(10) 데이터시트 |
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| RATE_SEL_HP(20) Design | RATE_SEL_HP(20) 데이터시트 | RATE_SEL_HP(20) Features | RATE_SEL_HP(20) Release Notes |
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| RATE_SEL_HP(20) Samples | RATE_SEL_HP(20) 회로도 | RS(204 Ersatz | RS(204 Schematico |
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| GUARD(10) 示意圖 | GUARD(10) EOL | GUARD(10) Ficha técnica de | XC4VLX40-10 Product Brief |
| XC4VLX40-10 Specs | XC4VLX40-10 Feature | XC4VLX40-10 Broker | XC4VLX40-10 PDF |
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| XC3S4000-4 Schematic | XC3S4000-4 Leadtime | XC3S4000-4 Circuit | XC3S4000-4 PDF |
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| XC3S4000-4 示意圖 | BLANK_SPNT(120) 相等于 | BLANK_SPNT(120) Design | BLANK_SPNT(120) Product Brief |
| BLANK_SPNT(120) Errata | BLANK_SPNT(120) Explanation | BLANK_SPNT(120) Revision | BLANK_SPNT(120) 데이터시트 |
| BLANK_SPNT(120) Samples | BLANK_SPNT(120) Schéma | BLANK_SPNT(120) 회로도 | BLANK_SPNT(120) Operating Parameter |
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