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SYSTEM DIAGRAM AD1893 EXAMPLE FREQUENCIES:DAT 48kH
description. The low-pass filter hasbeen designed so that full 20 kHz bandwidth is maintainedwhen the input and output sample clock frequencies are as lowas 44.1 kHz. If the output sample rate drops below the inputsample rate, the bandwidth of the input signal is automatically(continued on Page 4)One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700World Wide Web Site: http://www.analog.comFax: 781/326-8703 Analog Devices, Inc., 1998AD1893 SPECIFICATIONSREV. A 2 TEST CONDITIONS UNLESS OTHERWISE NOTEDSupply Voltage+3.0VAmbient Temperature25 CCrystal Frequency16MHzLoad Capacitance100pFAll minimums and maximums tested except as noted. PERFORMANCE1 (Guaranteed for VDD = +3.3 V to +5.0 V 10%)MinMaxUnitsDynamic Range (20 Hz to 20 kHz, 60 dB Input)96dBTotal Harmonic Distortion + Noise(20 Hz to 20 kHz, Full-Scale Input, FSOUT/FSIN Between 0.51 and 1.99) 94dB(1 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 and 1.4) 96dB(10 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 FEATURESLow CostLQFP and PDIP Packages3 V Supply Performance Specified Very Low PowerAutomatically Senses Sample Frequencies NoProgramming RequiredRejects Sample Clock JitterAccommodates Dynamically Changing AsynchronousSample Clocks8 kHz to 56 kHz Sample Clock Frequency RangeApproximately 1:2 to 2:1 Ratio Between Sample Clocks 96 dB THD+N at 1 kHz96 dB Dynamic RangeOptimal Clock Tracking Control Slow/Fast Settling ModesLinear Phase in All ModesAutomatic Output MuteFlexible Four-Wire Serial Interfaces with Right-Justified ModePower-Down ModeOn-Chip Oscillator APPLICATIONSConsumer CD-R, DAT, DCC, MD and 8 mm Video TapeRecorders Including PortablesDigital Audio Communication/Network SystemsComputer Multimedia SystemsPRODUCT OVERVIEWThe AD1893 SamplePort is a fully digital, stereo AsynchronousSample Rate Converter (ASRC) that solves sample rate interfacingand compatibility problems in digital audio equipment. Concep-tually, this converter interpolates the input data up to a very highinter SPECIFICATIONSREV. A 2 TEST CONDITIONS UNLESS
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