LIS331DLM: 2 g /4 g /8 g digital output high performance ultra low-power 3-axis accelerometer
DescriptionMinT0Data rate1/ODRT1Reading periodT0-T2T2New data generation (typ)616 sTable 4.Data signal on INT 1 and INT 2 padsI1(2)_CFG1I1(2)_CFG0INT 1(2) pin00Interrupt 1 (2) source01Interrupt 1 source OR Interrupt 2 source10DataReady11Boot running Startup sequenceAN298910/28 Doc ID 15761 Rev 1Figure 2.Interrupt and DataReady signal generation block diagramIn particular, the DataReady (DR) signal rises to 1 when a new set of acceleration data has been generated and is available for reading. The signal is reset after all the enabled channels are read through the serial interface.Figure 3.DataReady signal2.4 Understanding acceleration dataThe measured acceleration data are sent into the OUTX, OUTY, OUTZ registers.Acceleration data for the X (Y, Z) channel is expressed as a 2s complement number.2.4.1 Data alignmentAcceleration data are represented as 8-bit numbers, twos complement and are right justified.2.4.2 Example of acceleration dataTable5 provides a few basic examples of the data t features ultra low-power operational modes that allow advanced power saving and smart sleep to wake functions.The LIS331DLM has dynamically user-selectable full scales of 2 g /4 g /8 g and is capable of measuring acceleration with output data rates from 0.5 Hz to 400 Hz.The self-test capability allows the user to check the functioning of the sensor in the final application.The device can be configured to generate interrupt signals in response to inertial wakeup/free-fall events or based on the position of the device itself.The thresholds and timing of interrupt generators are programmable by the end user on the fly. The LIS331DLM is available in a small, thin plastic land grid array (LGA) package and is guaranteed to operate over an wide temperature range of -40 C to +85 C.www.st.com Contents AN29892/28 Doc ID 15761 Rev 1Contents1Register table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Startup sequence . . . . . . . . . . . . . . . datasheet of the device, the power-mode (PM) a
Other Descriptions
| I2C/SPI Xref | I2C/SPI 示意圖 | I2C/SPI Inventory | I2C/SPI Distribution |
| I2C/SPI Ersatz | I2C/SPI Errata | I2C/SPI User Guide | I2C/SPI Circuit |
| I2C/SPI Datasheet | I2C/SPI End-of-Life | I2C/SPI Fichetechnique | I2C/SPI Data Sheet |
| I2C/SPI 회로도 | I2C/SPI Application Note | I2C/SPI данные | INT2_DUR10 équivalent |
| INT2_DUR10 Example | INT2_DUR10 MOQ | INT2_DUR10 Scheda | INT2_DUR10 相等於 |
| INT2_DUR10 Prototype | INT2_DUR10 replacement | INT2_DUR10 PDF | INT2_DUR10 Distribution |
| INT2_DUR10 データシート | INT2_DUR10 δελτίο | INT2_DUR10 Circuit | INT2_DUR10 Revision |
| INT2_DUR10 Ersatz | INT2_DUR10 Fichatécnicade | CTRL_REG45 Schematico | CTRL_REG45 Design Idea |
| CTRL_REG45 Catalog | CTRL_REG45 Pin-out | CTRL_REG45 Capacity | CTRL_REG45 Feature |
| CTRL_REG45 Prototyping | CTRL_REG45 Inventory | CTRL_REG45 Product Brief | CTRL_REG45 Specs |
| CTRL_REG45 gleichwertige | CTRL_REG45 データシート | CTRL_REG45 Mechanical Outline | CTRL_REG45 Prototype |
| CTRL_REG45 Broker | STATUS_REG(7) MOQ | STATUS_REG(7) 데이터시트 | STATUS_REG(7) Suffix |
| STATUS_REG(7) Product Brief | STATUS_REG(7) equivalente | STATUS_REG(7) Availability | STATUS_REG(7) Errata |
| STATUS_REG(7) Release Notes | STATUS_REG(7) Design | STATUS_REG(7) Operating Parameter | STATUS_REG(7) Mechanical Outline |
| STATUS_REG(7) Features | STATUS_REG(7) Esquema | STATUS_REG(7) replacement | STATUS_REG(7) PCN |
| Hz01100 數據 | Hz01100 Design Idea | Hz01100 Distributor | Hz01100 MOQ |
| Hz01100 Prototyping | Hz01100 데이터시트 | Hz01100 Suffix | Hz01100 Equivalent |
| Hz01100 Component | Hz01100 Description | Hz01100 Stock | Hz01100 Datenblatt |
| Hz01100 End-of-Life | Hz01100 Samples | Hz01100 Process Change Notification | INT2_CFG Schematico |
| INT2_CFG Feature | INT2_CFG Inventory | INT2_CFG Component | INT2_CFG Схематический |
| INT2_CFG Description | INT2_CFG Availability | INT2_CFG gleichwertige | INT2_CFG Datenblatt |
| INT2_CFG Cross Reference | INT2_CFG Ficha técnica de | INT2_CFG Archive | INT2_CFG Esquema |
| INT2_CFG Application Note | INT2_CFG Broker | Hz50 Design Idea | Hz50 Distributor |
| Hz50 Xref | Hz50 Inventory | Hz50 Equivalent | Hz50 Product Brief |
| Hz50 Fichatécnicade | Hz50 δελτίο | Hz50 Stock | Hz50 Schéma |
| Hz50 회로도 | Hz50 Application Note | Hz50 Prototype | Hz50 replacement |
| Hz50 PDF | CTRL_REG5 數據 | CTRL_REG5 Lead Time | CTRL_REG5 Catalog |
| CTRL_REG5 Distributor | CTRL_REG5 EOL | CTRL_REG5 回路図 | CTRL_REG5 Suffix |
| CTRL_REG5 Component | CTRL_REG5 Схематический | CTRL_REG5 equivalente | CTRL_REG5 Availability |
| CTRL_REG5 Design | CTRL_REG5 Datenblatt | CTRL_REG5 Esquema | CTRL_REG5 PDF |
| INT1_CFG12 數據 | INT1_CFG12 Design Idea | INT1_CFG12 Catalog | INT1_CFG12 Component |
| INT1_CFG12 Схематический | INT1_CFG12 δελτίο | INT1_CFG12 Schéma | INT1_CFG12 End-of-Life |
| INT1_CFG12 Fichetechnique | INT1_CFG12 Schematic | INT1_CFG12 Mechanical Outline | INT1_CFG12 회로도 |
| INT1_CFG12 Fiche technique | INT1_CFG12 replacement | INT1_CFG12 PCN | CTR_REG5 Lead Time |
| CTR_REG5 MOQ | CTR_REG5 Inventory | CTR_REG5 Fichatécnicade | CTR_REG5 Availability |
| CTR_REG5 Leadtime | CTR_REG5 gleichwertige | CTR_REG5 Operating Parameter | CTR_REG5 Samples |
| CTR_REG5 Data Sheet | CTR_REG5 Esquema | CTR_REG5 Fiche technique | CTR_REG5 Options |
| CTR_REG5 данные | CTR_REG5 PCN |











