2-bit dual supply bus transceiver level translator with a side series resistor
DescriptionThe ST2G3236 is a dual supply low voltage CMOS 2-bit Bus Transceiver fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaindissipation.This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR inputs. The A-port interfaces with the 3V bus, the B-port with the 2.5V and 1.8V bus.All inputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage. QFN10 (1.8mm x 1.4mm)ST2G32362-bit dual supply bus transceiver level translatorwith a side series resistorwww.st.com Order codesPart numberPackagePackagingST2G3236QFN10 (1.8mm x 1.4mm)Tape and ReelContentsST2G32362/20 Contents1Logic diagram and I/O equivalent circuit . . . . . . . Features High speed:t PD = 6.2ns (Max.) at TA = 85CVCCB = 1.8VVCCA = 3.3VLow power dissipation: CCA = ICCB = 5A (Max.) at TA = 85CSymmetrical output impedance:|I OHA| = IOLA = 7mA Min at VCCA = 2.75V; VCCB = 1.65V or 2.3V|I OHB| = IOLBCCA = 2.3V or 3.0V; VCCB = 1.65VBalanced propagation delays:T PLH TPHL Power down protections on inputs and outputs 26 series resistor on A sideOperating voltage range:VCCA (OPR) = 1.4V to 3.6V VCCB (OPR) = 1.4V to 3.6V Max data rates:380Mbps (1.8V to 3.3V translation)260Mbps (<1.8V to 3.3V translation)260Mbps (Translate to 2.5V)210Mbps (Translate to 1.5V)Latch-up performance exceeds 500mA (JESD17) ESD performance:MM > 200VDescriptionThe ST2G3236 is a dual supply low voltage CMOS 2-bit Bus Transceiver fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V and 2.5V/1.8V supply systems, it achieves high speed operation wh specification is not implied. Exposure t
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